ENCE 3500 VLSI Design

Tentative Syllabus 
Autumn Quarter 1999

(The instructor reserves the right to adjust this syllabus when necessary.)


Title: VLSI Design -- ENCE 3500 -- Section 001
Text Book: Principles of CMOS VLSI Design: A Systems Approach -- Weste and Ehrgian -- Second Edition
Instructor: Christopher A. Gantz cgantz@du.edu or cag@cs.du.edu
Class Timings: TTH 7:00 pm -- 8:30 pm
Room: Knudson Hall Rm. 103
Office: Knudson Hall (CMK), Rm. 307
Office Hours: W 5:30 pm -- 7:30 pm
Telephone: 303 871-2789
TA: TBA cgantz@du.edu
Class Mailing List: ENCE 3500 ence3500@cs.du.edu


Prerequisites:


Course Description(High Level):

Design of Very Large Scale Integration integrated systems. Examination of layout and simulation of digital VLSI circuits using a comprehensive set of CAD tools in a laboratory setting. Studies layouts of CMOS combinational and sequential circuits using automatic layout generators. Fundamental structures of the layout of registers, adders, decoders, ROM, PLA's, counters, RAM, and ALU. Application of statistics and probability to chip performance. CAD tools allow logic verification and timing simulation of the circuits designed.



Course Goals:

Tentative Outline of
Detailed topics to be covered:
Week # Class Meeting
Dates
Topic(s) Topic Chapter Classes required
to cover
topic material
1:
Tues. 9/14/99 - Thu. 9/16/99 Introduction to CMOS Circuits
CMOS Logic, compound gates, behavioral and
structural representations
Chapter 1 (Sections 1.0 - 1.5)
(2 classes)
2:
Tues. 9/21/99 - Thu. 9/23/99 MOS Transistor Theory
nMOS transistor, body effect, MOS complementary
inverter, influence if Beta ratio, latch-up
Chapter 2
(2 classes)



Other References:


Assignment/Grading Information:


©1999 Christopher A. Gantz
University of Denver
Department of Engineering
Denver, CO 80208-2453
cgantz@du.edu